1. Field of the Invention
The invention relates to analog to digital converters and more specifically, to an analog to digital converter providing resolution enhancement utilizing a reduced span analog to digital converter.
2. Description of the Related Art
Analog to digital converters are circuit blocks which convert a span of analog voltages to digital numbers. It is customary to characterize this digital number, and consequently, the converter""s resolution by the number of bits it contains.
As a first example, if the digital output is composed of eight bits, the output number can take on any of 28=256 values. The analog input span""s dynamic range is thus considered to be divided into 256 discrete quanta for an eight bit converter.
As a second example, if the output is composed of 10 bits, the output number can take on any of 210=1024 values. The analog input span""s dynamic range is thus considered to be divided into 1024 discrete quanta for a 10 bit converter.
The mathematical reason for this is that a single bit represents two states, customarily referred to as a xe2x80x9c1xe2x80x9d and a xe2x80x9c0xe2x80x9d. If there are eight bits, the total number of combinations of xe2x80x9c1sxe2x80x9d and xe2x80x9c0sxe2x80x9d is 28.
Input signals exceeding the converter""s input span (also referred to as its dynamic range) typically result in undefined behavior.
The complexity of an analog to digital converter is strongly related to the number of bits it can provide: In general, the more bits which are required, the more complex the converter is. Converter complexity adversely influences its cost and development schedule. From a cost and schedule perspective, it is desirable to develop a converter having only a small number of bits. Unfortunately, many applications require high resolution to meet overall system requirements. This may force a resultant complexity onto the analog to digital converter.
The hereinafter described invention offers a means of compromise between converter resolution (the number of bits) and converter complexity.
3. Statement of the Problem
Analog to digital converters having relatively high resolution are often needed to satisfy a system""s requirements. Some circumstances allow the converter to be replaced by a special input preamplifier and a simpler converter, one providing few bits. This lowers overall circuit design complexity. The reduction in number of converter bits is compensated for by offset voltages applied to a special input amplifier.
High Resolution Conversion
The straightforward solution to the problem of digitizing at high resolution is to use a high resolution analog to digital converter. This technique is illustrated in FIG. 1 of the drawing.
FIG. 1 shows as an example the transfer function of a system whose analog to digital converter""s input span matches the system""s full input signal range. To achieve this match, the input signal was appropriately amplified as shown. In this example, the signal source input is plotted along the horizontal axis and extends between values of xe2x88x920.01 and +0.1. This input signal is amplified by a conventional analog circuit to provide an output signal extending between values of xe2x88x924 and +4. This amplified output signal is applied to the analog to digital converter""s input. The converter""s input span is typically designed to coincide with the full range of the amplified signal thereby taking advantage of the analog to digital converter""s entire dynamic range. The converter""s span as shown in the figure extends across the entire vertical axis of the figure.
If the system requirements state, for example, the input signal must be resolved to one part in 10,000, then a converter having at least 14 bits is required. Thirteen bits is insufficient as the following computations illustrate:
213=8192 The number of values a 13 bit converter can resolve.
214=16,384 The number of values a 14 bit converter can resolve.
Since the required resolution is greater than that offered by a 13 bit converter, an additional 14th bit is required. This greatly complicates the converter""s design.
A second means of utilizing low resolution converters for precision measurements is to sample the input signal at a high rate with the low-resolution converter. The digital output of the converter is reconstructed into an analog signal; also at the high rate. The reconstructed analog signal is compared with the original analog signal using a precision comparator circuit. If the reconstructed signal is higher than the input, the digital output of the converter is mathematically reduced and the reduced value converted to an analog value which is again compared to the input signal. This process continues until the reconstructed signal is smaller than the input. The reconstructed signal is then mathematically incremented until it is again larger than the input.
This has the effect of causing the reconstructed analog voltage to lock onto the input voltage in a servo-loop fashion. The mathematically determined values are applied to a digital filter whose output, at a much slower rate, is a precision digital representation of the input signal.
These types of converters are referred to as xe2x80x9csigma-deltaxe2x80x9d converters and can provide high performance. For example, an analog to digital converter consisting of a single bit can be used to provide a conversion whose resolution can exceed 20 bits.
A disadvantage of these converters is they cannot easily track rapidly changing input signals. It is easy for their servo-lock on the input signal to become broken if the slew rate of the input signal exceeds a fixed amount.
U.S. Pat. No. 4,183,016, Sawagata, xe2x80x9cParallel Analog-To-Digital Converter With Increased Resolutionxe2x80x9d
This patent utilizes an offset reference voltage to reduce the level of the input signal. However, this patent reduces the input signal by only a single, least significant bit, which is then added on to the converted signal. In contrast, the present AD converter system separately converts a reference voltage, comprised of potentially more than a least significant bit. This voltage is then subtracted from the input voltage, which is then converted. The converted reference voltage is then added to the converted reduced input voltage. The present invention allows for a greater improved resolution, for input signals which have a large DC level imposed on a small AC signal.
U.S. Pat. No. 5,250,948, Berstein et al., xe2x80x9cHigh Level Resolution Enhancement for Dual-Range AID Conversionxe2x80x9d
This patent discloses a dual range A/D in which there are two possible signal paths. If the input signal is small, then the first path, which contains an input amplification, is used. If the input signal is large, the second path, which contains unity gain, is used. In contrast, the present AD converter system utilizes a single input path in which the input is reduced by an offset voltage to eliminate any DC component of the signal. The preconverted offset is then added to the signal conversion to provide the conversion of the full input signal.
U.S. Pat. No. 5,608,399, Coleman, Jr., xe2x80x9cResolution Enhancer Circuit for Analog to Digital Conversionxe2x80x9d
This patent provides conversion to a wide ranging analog input signal. If the signal exceeds the limit of the A/D, then the input is scaled down. If the input is much less than the range of the A/D, then the input is scaled up. The difference between the prescaled and scaled signal is separately input to the A/D to provide the final converted output. In contrast, the present AD converter system is directed to only eliminating the DC component and input signal, to allow for higher resolution of the AC component. The DC component is separately digitized and added to the AC converted output.
The present AD converter system concerns those signals which have a low frequency component (such as DC) superimposed upon an AC component. The magnitude of the AC component must be less than or equal to one-half the span of the converter. The majority of signal transducers, such as pressure to voltage converters, satisfy this requirement. For these signals, the present invention provides a high resolution ADC with the simplicity advantage inherent in a reduced resolution ADC. This is accomplished by first connecting the input signal through a programmed gain preamplifier. The preamplifier matches the full range of the ADC to only the AC component portion of the input signal. In order to cover the entire input signal, the ADC""s range is complemented by an offset value. The advantage of this technique is the preamplifier, designed to amplify the input signal at high gain, while applying the offset value at low gain. A digital summing junction combines the analog to digital conversion results with the offset value, resulting in a higher precision overall conversion.